Virtex-6 FPGA Connectivity Kit

Product Details

• Xilinx Connectivity Platforms Product Brief (PDF)
• Signup for Product Updates

Documentation

• Virtex-6 FPGA Connectivity Kit Documentation
• Virtex-6 Connectivity Kit Release Notes
• Spartan-6 & Virtex-6 FPGA Connectivity Kit FAQ (PDF)
• Targeted Reference Designs Accelerate Implementation Times for Connectivity White Paper (PDF)

Device Family Support

• Virtex-6 LXT

The Virtex®-6 FPGA Connectivity Kit is a comprehensive high performance Connectivity Development, Debug and Demonstration platform for high-bandwidth and high-performance applications in multiple market segments.

The Virtex-6 FPGA Connectivity Kit delivers a fully validated and supported Connectivity Targeted Reference Design Framework that integrates built-in blocks for GTX transceivers and PCI Express, soft IP for XAUI protocol, a high-performance 10G DMA IP core from Northwest Logic and a Virtual FIFO memory controller interfacing to an external DDR3 memory. The Targeted Reference Design Framework delivers – hardware design / RTL source files, simulation environment, implementation scripts and design flows. Along with the Linux device drivers, a GUI based software application is also provided.

In addition, also included with each Virtex-6 FPGA Connectivity Kit is a full-seat of Xilinx ISE® Design Suite: Embedded Edition device locked to the Virtex-6 LX240T device.

For Japan Customers Only,
please order number: DK-V6-CONN-G-J
through your local Japan distributor.

What's Included

• ROHS compliant ML605 Base Board including the XC6VLX240T-1FFG1156 CES  FPGA
• Vita57.1 FMC daughter card with one CX4, two SATA, and eight SMA connectors
• ISE Design Suite: Embedded Edition (Device-locked to the Virtex-6 LX240T FPGA)
• Documentation
  • Virtex-6 FPGA Connectivity Kit Hardware Setup Guide.
  • Virtex-6 FPGA Connectivity Kit Getting Started.
  • Virtex-6 FPGA Targeted Reference Design User Guide.
  • Example Designs User Guide.
  • Schematics and PCB files.
• Cables & Adapters
  • Universal 12V power supply.
  • Two USB cables.
  • One Ethernet cable.
  • One DVI-VGA adapter – standard interface for video display.
  • One CX4 loopback adapter
  • One SATA straight and loopback cable
• Connectivity Targeted Reference Design (TRD) and Demonstration
  • Design includes support for PCI Express® (x8 Gen1 / x4 Gen2), DMA, Virtual FIFO Memory controller supporting DDR3 interface, and XAUI interface
  • TRD Design Files including top-level RTL / Source files
  • TRD ISE Project files, Simulation and Implementation Environment
  • 10G DMA Design – Northwest Logic PCIe Packet DMA IP (Evaluation hardware timeout version and Simulation Model)
  • TRD Interface Software – Linux Device Drivers, Application, Demonstration
• Examples Designs and Demonstrations
  • Board Diagnostic Demo
  • ChipScope Pro Serial IO Toolkit IBERT Transceiver Test Design.
• USB Flash Drive
  • All reference designs including TRD files, demos, and documents are delivered on a USB stick.
• Fedora 10 Live CD - Linux Operating System

Key Features

• FPGA: XC6VLX240T-1FFG1156 
• Serial Connectivity:
  • PCI Express x8 Edge Connector
  • SFP transceiver connector (SFP module not included)
  • On board SMA: 1 SMA port (Tx & Rx) for off-board GTX transceiver connectivity
  • FMC Daughter Card: CX4 connectivity
  • FMC Daughter Card: 2 SATA connectivity ports
  • FMC Daughter Card: 2 SMA ports for off-board GTX transceiver connectivity
• Parallel Connectivity:
  • 10/100/1000 Tri-Speed Ethernet (RJ-45)
  • USB To UART Bridge
  • USB Host Port and USB Peripheral Port
• Memory
  • DDR3 SO-DIMM (512 MB)
  • BPI Linear Flash (32 MB) (Also available for configuration)
  • IIC EEPROM (8 Kb)
• Additional Connectivity:
  • FMC Expansion Port: Low Pin Count (LPC)
    • One GTX Transceiver
    • 68 SelectIOs
  • User GPIO with two SMA connectors
• Device Configuration:
  • Onboard configuration circuitry (USB to JTAG)
  • 16MB Platform Flash XL
  • 32MB Parallel (BPI) Flash
  • System ACE CF with 2GB Compact FLASH (CF) Card
• Clocking
  • 200 MHz Oscillator (Differential)
  • 66 MHz Socketed Oscillator (Single-Ended)
  • SMA Connectors for external clock (Differential)
  • GTX Reference Clock port with 2 SMA connectors 
• Display & Controls:
  • 16x2 LCD character display
  • DVI Output
  • System Monitor
  • User Push buttons (5), DIP switches (8), LEDs (13)
  • User GPIO with two SMA connectors
• Power
  • 12V wall adapter or ATX
  • Voltage and Current measurement capability of 2.5V, 1.5V, and 1.2V, 1.0V supplies